• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    In power supply circuit devices such as power MOSFET monolithic integrated circuit devices or composite devices, the lead pins derived from the package are five equally spaced pins, and the creepage distance between the third pin, which becomes a high potential, and another pin adjacent thereto is not sufficiently maintained. It was not desirable for safety reasons. According to the present invention, the distance between the third pin and another pin adjacent to each other is wider than the distance between the other pins, and the third pin is formed at the upper end, the other adjacent pin is lowered, and the other pins are formed at the intermediate end. This makes it possible to sufficiently secure the creepage distance between the third pin of high potential and the other pin adjacent thereto, thereby providing a preferable structure for safety. In addition, since the header part is not exposed by the full mold package, handling is easy.
    公开号:KR20030060870A
    申请号:KR10-2003-7000701
    申请日:2002-05-17
    公开日:2003-07-16
    发明作者:쯔찌다미쯔호；이께다겐지；니시까와마도까
    申请人:산요 덴키 가부시키가이샤；
    IPC主号:
    专利说明:

    Power circuit device {POWER SOURCE CIRCUIT DEVICE}
    [2] As is already known, an IC package in which an IC chip and a lead (lead pin) are connected by wire bonding or the like and which is externally covered with a package body made of resin is adopted.
    [3] 2 shows an example in which five lead pins are used for a conventional IC package. Fig. 2A is a top view, Fig. 2B is a sectional view taken along the line B-B in Fig. 2A, and Fig. 2C is a side view of Fig. 2B viewed from the arrow direction.
    [4] Since the IC 12 is mounted on the power MOSFET 11 in a monolithic integrated circuit or a composite element including the power MOSFET 11, it is common to use lead pins having five pin pitches at equal intervals d3. According to FIG. 2A, five lead pins 14 are provided on one side wall of the package main body 13. In this case, the center third pin 14c is connected to the drain terminal of the MOSFET and the fifth pin 14e is connected to the source terminal, and the first pin 14a, the second pin 14b, and the fourth pin 14d are connected. Is connected to the control terminal of the IC. Since the drain terminal of the MOSFET 11 normally has a high potential and the source terminal is grounded to GND, the potential difference between these terminals becomes very large, so that the third and fourth pins 14c and 5th pin are not adjacent to each other. (14e) is used.
    [5] FIG. 2B shows the forming in the case of mounting this package. As shown in the figure, the first fin 14a, the third fin 14c, and the fifth fin 14e are bent upwards, and are adjacent to the adjacent second fin 14b and the fourth fin 14d. Creepage distance is made (refer to FIG. 2 (c)). This is a means used for suppressing the occurrence of solder bridges in the case of mounting short circuits between adjacent lead pins or soldering a solder on a printed board when an IC package having such a structure is mounted on a circuit board surface by soldering.
    [1] BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply circuit device, and more particularly, to a power supply circuit device using an IC package improved in a lead shape introduced from a package main body.
    [35] FIG. 1A is a top view illustrating the power circuit device of the present invention, FIG. 1B is a cross-sectional view taken along line AA of FIG. 1A, and FIG. 1C is a cross-sectional view of FIG. (b) is a side view which looked at the arrow direction, FIG.2 (a) is a top view explaining the power supply circuit apparatus in a prior art, FIG.2 (b) is sectional drawing of the BB line of FIG.2 (a). 2 (c) is a side view of FIG. 2 (b) seen from the arrow direction.
    [6] In general, the intervals between the lead pins are equal intervals d3 for assembly reasons, and the back surface of the internal element is connected to the center pin. That is, in the case of a power MOSFET, the drain electrode on the back side is directly fixed by the conductive adhesive or the like. In the package of the power MOSFET, the creepage distance between the terminal (center terminal) which is generally 3-pin and the drain which becomes high potential, and the other terminal adjacent to it was far enough. However, in a monolithic integrated circuit including a power MOSFET as described above, a composite element, or the like, since IC is mounted on the power MOSFET, it is common to use five equally spaced lead pins. In this case as well, since the third pin in the center is connected to the drain electrode of the power MOSFET, when a power MOSFET having a high 800 V isoelectric voltage is mounted, the creepage distance from other adjacent pins is not sufficiently maintained at the equally spaced lead pins. Do not. That is, when the IC package having such a structure is mounted on the surface of the circuit board by soldering, if the creepage distance between the third pin to become the high potential and the second and fourth pins adjacent to each other is small, shorting due to dust or the like is likely to occur. There is a problem. In addition, when soldering on a printed board, the solder becomes wider than between the lead pins, so that there is a problem of easily causing solder bridges. For example, when the operating voltage is 700 V, the creepage distance is required to be 1.9 mm. In the conventional structure, even when the lead pin is bent in the vertical direction, only about 1.7 mm creepage distance can be secured. There are also concerns that the criteria cannot be met. That is, in the structure of the conventional lead pin, securing the creepage distance was insufficient.
    [7] In the conventional package, the portion of the header 14h, which is integrally formed with the third pin and connected, has an exposed structure despite the connection of a drain electrode having a high potential, such as 800 V, to handle the product. There was also a safety problem that was undesirable.
    [8] SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems. Firstly, a MOSFET, a package sealing the MOSFET, and a plurality of lead pins derived from one side wall of the package body are provided. It is a power supply circuit device which connected the drain terminal, and solves it by providing the desired creepage distance by making the space | interval of the said center lead pin which becomes high potential, and another lead pin adjacent to one another larger than the space | interval of said other lead pins.
    [9] In addition, the package is characterized in that the full mold structure.
    [10] In addition, an IC is mounted on the MOSFET.
    [11] A second power supply circuit having a MOSFET, a package encapsulating the MOSFET and a plurality of lead pins derived from one side wall of the package body, and a drain terminal of the MOSFET connected to a center lead pin of the plurality of lead pins; The center lead pin having a high potential greater than the distance between the other lead pins adjacent to the other lead pins is greater than the lead pins having the lowest potential among the plurality of lead pins. This is solved by bending the other lead pin to the middle end between the upper end and the lower end, and providing a desired creepage distance between the center lead pin to be the high potential and the lead pin to be the low potential.
    [12] In addition, the package is characterized in that the full mold structure.
    [13] In addition, an IC is mounted on the MOSFET.
    [14] Thirdly, a power supply circuit having a MOSFET, a package that seals the MOSFET, and five lead pins derived from one side wall of the package main body, and a drain terminal of the MOSFET is connected to a third lead pin located at the center thereof, The distance between the third lead pin which becomes the high potential and another lead pin adjacent to each other is made larger than the distance between the other lead pins, and the desired creepage distance with the second and fourth lead pins of the low potential adjacent to the third lead pin It is to solve by providing.
    [15] In addition, the distance from the third lead pin to the second and fourth lead pins is characterized by being out of the gap between the first and second lead pins and the fourth and fifth lead pins.
    [16] Further, the second and fourth lead pins are bent to the lower end, the third lead pins are bent to the upper end, and the first and fifth lead pins are bent to an intermediate end between the upper end and the lower end, and the third lead pins and the The desired creepage distance is provided between the second and fourth lead pins.
    [17] In addition, the package is characterized in that the full mold structure.
    [18] In addition, an IC is mounted on the MOSFET.
    [19] That is, the creepage distance sufficient for safety is ensured by extending the space | interval of the 3rd pin which becomes a high potential, and another lead pin adjacent to it, and forming a lead pin into three steps of an upper stage, an intermediate stage, and a lower stage.
    [20] In addition, since the package main body has a full mold structure, since the frame on the back surface of the package formed in the same process as the third pin is not exposed, a package that can be safely handled even when a high voltage is applied as the drain terminal is provided.
    [21] An embodiment of the present invention will be described in detail with reference to FIG. 1 taking five lead pin packages as an example.
    [22] Fig. 1A is a top view, Fig. 1B is a sectional view taken along the line AA of Fig. 1A, and Fig. 1C is a side view of Fig. 1B viewed from the arrow direction. .
    [23] The power supply circuit device of the present invention is composed of a MOSFET, an IC 2, a package 3, and five lead pins 4.
    [24] MOSFET 1 includes cells of a plurality of MOSFETs therein. The back surface is a drain electrode, and is fixedly attached to the header 4h to be integrally formed with the third pin 4c and to be connected (see Fig. 1B).
    [25] The IC 2 is mounted on the MOSFET 1 and connected to the source electrode and the drain electrode of the MOSFET 1, and each control terminal is a first pin 4a, a second pin 4b and a fourth pin ( 4d) (see Fig. 1 (b)).
    [26] The package 3 seals the MOSFET 1 and the IC 2 with an insulating resin by a transfer mold or the like. Since the package 3 is a full-mold structure, since the drain electrode of the MOSFET 1 is covered with a resin to the back of the header 4h of the lead to which the drain electrode is fixedly attached, the header 4h under high voltage is not exposed. It is also preferable for safety.
    [27] Five lead pins 4 are drawn from one side wall of the package body 3. Here, as shown in the drawing, the first pin 4a, the second fin 4b, the third fin 4c, the fourth fin 4d, and the fifth fin 4e are formed from the fin at the end. The third pin 4c positioned at the center thereof is connected to the header 4h so as to be integrally formed, and the drain electrode of the MOSFET 1 is connected to the header 4h so that the third pin 4c is connected to the drain terminal. The fifth pin 4e becomes a source terminal. The first pin 4a, the second pin 4b, and the fourth pin 4d become control terminals of the IC 2. The distance d2 between the third pin 4c at the highest potential and the second pin 4d and the fourth pin 4d adjacent to each other ensures a creepage distance that satisfies the safety standard. The space | interval d1 of the 1st pin 4a-the 2nd pin 4b, and the 4th pin 4d-the 5th pin 4e are secured more than the space | interval d1. Specifically, for example, the interval d2 between the third fin 4c-the second fin 4b or the third fin 4c-the fourth fin 4d is 2.54 mm, and the first fin 4a )-The distance d1 between the second fin 4b and the fourth fin 4d and the fifth fin 4e is 0.5 mm. For example, when the operating voltage is 700 V, the safe creepage distance is 1.9 mm, and when the 800 V is 2.1 mm, according to the structure of the present invention, the third pin 4c and the second pin 4b, which become high voltage, The space | interval with 4th pin 4d is sufficient.
    [28] In addition, as shown in FIGS. 1B and 1C, the lead pins 4 drawn from the package 3 are arranged in three steps of upper, middle, and lower stages, that is, headers. It bends and forms in the vertical direction with respect to (4h). Here, the second fin 4b and the fourth fin 4d are set to the lower end in the shape of the state where the fourth fin 4b and the fourth fin 4d are drawn, and the third fin 4c is formed at the highest position to form the upper end, the first fin 4a and the fifth. The pin 4e is formed at the position between the upper end and the lower end to be the intermediate end. Specifically, the interval h1 between the lower end and the middle end is 2.3 mm, and the interval h2 between the middle end and the upper end is 2.8 mm. In addition, the leading end of the lead pin 4 to be soldered by the forming angle can also be widened in the vertical direction at a desired distance.
    [29] A feature of the present invention lies in the placement of the lead pins. The distance between the third pin and the second and fourth pins adjacent to the high potential is wider than the distance between the first and second pins, and the fourth and fifth pins, and thus the horizontal direction with respect to the header 4h. It is to secure creepage distance from. In addition, by forming the third pin at the upper end, the first and fifth pins at the intermediate end, and the second and fourth pins at the lower end, the second and the third pins adjacent to the third pin also in the vertical direction with respect to the header 4 (h). It extends the creepage distance with a 4th pin.
    [30] As described above, a sufficient creepage distance can be obtained in the step before forming, but since the solder is widened on the printed board when mounted on the printed board, the creepage distance should be as short as possible to prevent short caused by the solder bridge or shorted by dust. It is preferable to secure. That is, the creepage distance is also reduced in the vertical direction by lowering the lead pin spacing in the horizontal direction, and then forming the three-stage forming with the third pin that is the highest voltage as the upper end and the adjacent second and fourth pins as the lower end. Widening can be prevented, and a package desirable for safety is realized.
    [31] In addition, the package has a full mold structure, and the rear surface of the header 4h to which the drain electrode, which becomes a high potential, is fixedly exposed is not exposed, so that handling of the product is also safe and easy.
    [32] According to the present invention, the creepage distance in the horizontal direction with respect to the header is secured by widening the distance between the third pin serving as the high potential and the other lead pin adjacent thereto from the distance between the other lead pins. In addition, by forming the third pin at the upper end, the first and fifth pins at the intermediate end, and the second and fourth pins at the lower end, the second fin is further separated from the header in the vertical direction and is adjacent to the third fin. And the creepage distance with the fourth pin. When the creepage distance is extended, the short by the solder bridge, the short by the dust, etc. on a printed board can be prevented.
    [33] Specifically, for example, at 800 V, a creepage distance of 2.1 mm is required, and when the five fins of the conventional equal interval can only secure a creepage distance of about 1.7 mm, it is insufficient for safety. However, according to the structure of the present invention, the distance between the second and fourth fins adjacent to the third fin is extended to 2.54 mm, and the lead pin is formed by the forming angle at a distance of about 5.8 mm from the upper and lower ends. The distance from the tip of the can be further extended to ensure sufficient creepage distance for safety.
    [34] In addition, the package has a full-mold structure, and the header portion to which the drain electrode, which becomes a high potential, is fixedly attached is not exposed on the back side, so that handling of the product is also safe and easy.
    权利要求:
    Claims (11)
    [1" claim-type="Currently amended] A power supply circuit having a MOSFET, a package sealed with the MOSFET, and a plurality of lead pins derived from one side wall of the package body, wherein a drain terminal of the MOSFET is connected to a center lead pin of the plurality of lead pins;
    The power supply circuit device, characterized in that a desired creepage distance is provided by making a distance between the center lead pin which becomes a high potential and another lead pin adjacent to each other larger than the distance between the other lead pins.
    [2" claim-type="Currently amended] The power supply circuit device of claim 1, wherein the package has a full mold structure.
    [3" claim-type="Currently amended] The power supply circuit device according to claim 1, wherein an IC is mounted on the MOSFET.
    [4" claim-type="Currently amended] A power supply circuit having a MOSFET, a package sealed with the MOSFET, and a plurality of lead pins derived from one side wall of the package body, wherein a drain terminal of the MOSFET is connected to a center lead pin of the plurality of lead pins;
    The distance between the center lead pin which becomes a high potential and another lead pin adjacent to each other is made larger than the distance between the other lead pins, and the lead pin which becomes the lowest potential among the plurality of lead pins is lowered, and the center lead pin To the top, bending another lead pin to the middle end between the top and bottom, and providing a desired creepage distance between the center lead pin to be the high potential and the lead pin to be the low potential. .
    [5" claim-type="Currently amended] The power supply circuit device according to claim 4, wherein the package has a full mold structure.
    [6" claim-type="Currently amended] The power supply circuit device according to claim 4, wherein an IC is mounted on the MOSFET.
    [7" claim-type="Currently amended] A power supply circuit device having a MOSFET, a package sealing the MOSFET, and five lead pins derived from one side wall of the package body, and connecting a drain terminal of the MOSFET to a third lead pin located at the center thereof;
    The distance between the third lead pin which becomes a high potential and another lead pin adjacent to it is larger than the space | interval of the said other lead pins, and the 2nd and 4th lead pin of the low potential adjacent to the said 3rd pin pin, and desired surface A power supply circuit device for providing a distance.
    [8" claim-type="Currently amended] 8. The power supply circuit device according to claim 7, wherein an interval from the third lead pin to the second and fourth lead pins is farther than an interval between the first and second lead pins and the fourth and fifth lead pins. .
    [9" claim-type="Currently amended] The method of claim 7, wherein the second and fourth lead pins are bent to the lower end, the third lead pins are bent to the upper end, and the first and fifth lead pins are bent to an intermediate end between the upper end and the lower end, and the third And a desired creepage distance between the lead pins and the second and fourth lead pins.
    [10" claim-type="Currently amended] 8. The power supply circuit device according to claim 7, wherein the package has a full mold structure.
    [11" claim-type="Currently amended] 8. The power supply circuit device according to claim 7, wherein an IC is mounted on the MOSFET.
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    同族专利:
    公开号 | 公开日
    CN1312767C|2007-04-25|
    US6861732B2|2005-03-01|
    US20040026770A1|2004-02-12|
    KR100612165B1|2006-08-14|
    WO2002095824A1|2002-11-28|
    CN1462476A|2003-12-17|
    JPWO2002095824A1|2004-09-09|
    JP4118143B2|2008-07-16|
    引用文献:
    公开号 | 申请日 | 公开日 | 申请人 | 专利标题
    法律状态:
    2001-05-18|Priority to JP2001149636
    2001-05-18|Priority to JPJP-P-2001-00149636
    2002-05-17|Application filed by 산요 덴키 가부시키가이샤
    2002-05-17|Priority to PCT/JP2002/004774
    2003-07-16|Publication of KR20030060870A
    2006-08-14|Application granted
    2006-08-14|Publication of KR100612165B1
    优先权:
    申请号 | 申请日 | 专利标题
    JP2001149636|2001-05-18|
    JPJP-P-2001-00149636|2001-05-18|
    PCT/JP2002/004774|WO2002095824A1|2001-05-18|2002-05-17|Power source circuit device|
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